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Tanner EDA to Present at GlobalSpec Semiconductor Manufacturing Online Conference and Trade Show: Breaking through the Analog Design Bottleneck

MONROVIA, California – November 5, 2010 – Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs), will present on the conditions that have made analog design a barrier to shorter cycle times and demonstrate a tool designed to break the analog design bottleneck during the GlobalSpec Semiconductor Manufacturing Online Conference and Trade Show on November 10th, 2010.


John Zuk, vice president of marketing & strategy and Nicolas Williams, director of product management, Tanner EDA


“Breaking through the Analog Layout Design Bottleneck” -- Presentation on Tanner EDA’s newest high-performance device generator tool -- HiPer DevGen –– which works in conjunction with their well-known layout editor (L-Edit) to create high-quality analog circuit structures that are correct by construction, silicon-aware, and fine-tuneable.  Zuk will examine the business and technological conditions that IC designers face and Williams will demonstrate how HiPer DevGen accelerates the most time-consuming aspects of the layout process to deliver reduced cycle time and consistent high quality.


Wednesday, November 10th, 2010 at 2:00pm Eastern Time


Online -  www.globalspec.com/events

GlobalSpec’s FREE online Semiconductor Manufacturing e-Event  will have leading edge presentations, Q&A sessions, and an exhibit floor packed with the latest technology offering new products and more, presented by key manufacturers in the areas of optical testing, analog integrated circuit design, the development of MEMS technologies and power conservation in hand-held devices.  The Semiconductor Manufacturing e-Event offers conference-goers as much or more than they can get from a traditional trade show. Understand the latest technologies impacting product development, discover new applications and markets, and be among the first to learn about new product releases.  Within the online environment, networking with manufacturers and peers is as simple as an instant message or the exchange of a v-card, and you can easily gather valuable resources like white papers, tech articles, and data sheets in your online briefcase (which will never get heavy).  GlobalSpec e-Events provide all of this in a one-day live conference without a pricey registration fee, travel or lodging expenses.

About Tanner EDA

Tanner EDA provides a complete line of software solutions that catalyze innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs). Customers are creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership (TCO). Capability and performance are matched by low support requirements and high support capability as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.

Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.

HiPer Verify and HiPer Silicon are trademarks of Tanner Research, Inc. GlobalSpec, SpecSearch, The Engineering Search Engine and The Engineering Web are registered trademarks of GlobalSpec, Inc. All other trademarks and trade names are the property of their respective owners.


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Contact for Tanner EDA:

Linda Marchant, Cayenne Communication LLC -- 919-451-0776 This email address is being protected from spambots. You need JavaScript enabled to view it.

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